1. Field of the Invention
The present invention relates generally to a data transfer device and method that transfers digital data between data processing devices.
2. Description of the Related Art
In a data processing device formed with a micro processor unit (hereinafter referred to as MPU) and peripheral circuits, it is desirable to utilize circuit designs which most efficiently transfer data between the MPU and peripheral circuitry. When large amounts of data are to be transferred to or from sequential memory locations concurrently with the running of a main program, it is not feasible to use an interrupt system because it requires too much time for service by the software subroutine. This problem is solved in many computer systems through the use of a Direct Memory Access Controller (hereinafter referred to as DMAC). With DMACs, every time a peripheral is ready to transfer a data word, the DMAC signals the computer, and without disturbing the computer or an associated accumulator, the main program instruction stream is delayed one memory cycle while hardware logic completes the data transfer. Thus, the main advantage of using DMACs is that the data transfer occurs independently of the main program without the use of software.
Since DMACs generally do not employ software routines, the following general hardware design aspects have, in the past, been widely used to implement a DMAC. First, an address register must be designed to point to memory locations that are intended to receive or transmit data. Second, a method must be designed to increment the address register so that a sequential group of memory locations can take part in the data transfer operation. Third, a method must be devised to determine when the last memory location has been served. Fourth, a data buffer must be included to serve as a temporary storage register for data as the data is transferred between the memory buffer and the peripheral. Fifth, control signals must be provided to the computer from the DMAC to let the computer know when service is required as well as to indicate whether data is being transferred to or from a peripheral.
Each of data to be transferred has a length of several bytes. The data stored in the buffer memory is read out and transferred in a word to word manner according to the number of bytes of data stored therein, e.g., four bytes. The MPU then converts the number of bytes in the inputted data and transmits the converted data, in order to increase the transfer efficiency.
During data transfer operations, it is oftentimes desirable to store bytes located in the middle of the data to a location in the buffer memory first, rather than starting by storing the top byte thereof first. Often, when operations for storing data are carried out by first transferring bytes located in the middle of each word, the actual number of words to be transferred varies according to the number of bytes comprising the stored data. For example, if one word has four bytes, and the data to be stored has four bytes and if the data is sequentially stored from the top byte thereof, the data oftentimes forms one word. If the data is stored beginning with the byte located in the middle of word, the number of words formed therefrom is oftentimes two words. Regardless, when the data stored in the buffer memory is transferred into another memory via the DMAC, it is necessary to compute the number of words to be transferred.
However, in order to compute the number of words of stored data, the DMAC many times has to incorporate a large scale logic circuit. This frequently causes a reduction in data processing speed, as well as an increase in the circuit area occupied by the DMAC. Also, if the data to be transferred is consistently written from the top byte of each word into the buffer memory, the entire capacity of buffer memory will not be efficiently utilized.